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MIPS Technologies Helps Reduces Risk On Next-Gen GPS Devices

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by Staff Writers
Lisbon, Portugal (SPX) Jul 29, 2008
MIPS Technologies has introduced a new generation of its Global Positioning System (GPS) RF Tuner IP solution. The silicon-proven, integrated low-noise RF front-end for GPS receivers in the L1 band enables embedded system designers to decrease costs and time-to-market for next-generation devices incorporating GPS.

The new GPS Tuner IP is ideal for companies developing new GPS devices, adding GPS functionality to other types of devices, or looking to reduce the form factor and development costs of a next-generation device.

The IP is targeted for virtually any location application, such as high-end navigation systems in cars, cell phones and PDAs. Its cost and area advantages make it especially well suited for ultra-mobile devices, handheld games, portable media players, mobile PCs and digital cameras.

According to market research firm In-stat, GPS chipset shipments are expected to grow to 725 million in 2011, and GPS chipset revenues are expected to grow from $520 million in 2006 to more than $1.3 billion in 2011.

The firm also reports that sales of mobile devices with integrated GPS are expected to grow from 180 million units in 2007 to 720 million units in 2011.

"We are seeing increased interest in our GPS IP solutions as navigation and localization technologies proliferate across devices and markets," said Carlos Leme, vice president of IP wireless solutions, Analog Business Group, MIPS Technologies.

"Today's device manufacturers are looking to integrate GPS functionality in embedded systems because of the cost, area and time-to-market benefits, especially in high-volume products. Our GPS IP is silicon-proven, allowing customers get to market quickly with low risk."

With standard digital output, the new generation of MIPS Technologies' GPS Tuner IP core CI10084tg supports Global Navigation Satellite System (GNSS) systems in the L1 band and is also compatible with Galileo, for a broad range of markets and applications.

The GPS Tuner IP core uses a fractional PLL, allowing designers to leverage the crystal frequencies available in the host application. A wide range of flexible options lets system designers optimize parameters like power modes and baseband filter settings for their specific application.

Automatic gain control and tuning provide autonomous operation independent of the selected baseband demodulator. The core has a die area of 4mm2 (including IO ring with ESD protections), with an integrated LNA and PLL loop filter to help maintain a small form factor.

MIPS Technologies' GPS IP solution is optimized for System-in-Package (SiP) integration, with a product roadmap targeting migration to 65nm to support future generations of satellite receivers within SoCs.

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San Diego State University Improves MEMS Accelerometer Tunability
San Diego CA (SPX) Jul 16, 2008
Researchers at San Diego State University have developed a new concept for improving MEMS accelerometer tunability. This method can increase wide-band tunability with ranges much larger than current practice, a significant improvement from the previously accepted 5-10%.







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